Embodiments of the inventive concept described herein relate to a serializer and a data transmitter including the same.
As data throughput of a system is increasing, a demand for high-speed and low-power input/output is increasing. Accordingly, there are being made attempts to reduce power consumption while transmitting data in high speed at a transmitter. In general, a transmitter which transmits data includes a serializer, which converts a plurality of parallel data signals into a serial data stream and transmits the serial data stream to a receiver.
A conventional serializer serializes a plurality of data signals input in parallel by applying a clock and a pulse signal to the data signals. For example, a 4:1 serializer generates a pulse signal using a quadrature clock and synchronizes the pulse signal with a data signal to serialize four parallel data signals to a data stream.
Accordingly, the conventional serializer necessitates a circuit block for generating a pulse signal, a circuit block for adjusting a phase of the pulse signal, a circuit block for synchronizing the pulse signal with a data signal, and the like. In the case of a circuit block using a clock for serialization, as a speed of the clock becomes higher, power consumption becomes greater. Also, as the number of circuit blocks in a chip becomes greater, power consumption becomes greater.